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Our Instructors are the best in their field of expertise Robert Aitken – ARM Ltd. Rob has spent the last 15 years working on various aspects of IC design for testability. His current responsibilities include design and test methodology for Artisan's Libraries (Artisan is now a part of ARM Ltd. He has worked and published in a variety of areas relating to test, including test synthesis, fault modeling, IDDQ testing, and fault diagnosis, as well as contributing to numerous proprietary and/or patented technologies for Agilent's IC business. He has published over 40 technical papers on testing and diagnosis, and received the best paper award from the International Test Conference in 1992. He holds a Ph.D. degree from McGill University in Canada. Dr. Aitken is a member of the IEEE, an associate editor of IEEE Transactions on Computer-Aided Design, and serves on several program committees, including that of International Test Conference. He has also served on the executive committee of the International Conference on CAD and the International Test Synthesis Workshop. Karen Bartelson – Karen is the Director of Quality and Interoperability at Synposys. She has taught in-house courses on Electronic Design Automation, and taught seminars at several design automation conferences. Dr. Jeffrey Gambino - Jeff Gambino received the B.S. degree in materials science from Cornell University, Ithaca, NY, in 1979, and the Ph.D. degree in materials science from the Massachusetts Institute of Technology, Cambridge, MA, in 1984. He joined IBM, Hopewell Junction, NY, in 1984, where he worked on silicide processes for Bipolar and CMOS devices. In 1992, he joined the DRAM development alliance at IBM's Advanced Semiconductor Technology Center, Hopewell Junction, NY. While there, he developed contact and interconnect processes for 0.25-, 0.175-, and 0.15-mm DRAM products. In 1999, he joined IBM's manufacturing organization in Essex Junction, VT, where he has worked on copper interconnect processes for CMOS logic technology. He has published over 90 technical papers and holds over 100 patents. Anne Gattiker – IBM Microelectronics. Anne is a Research Staff Member at IBM's Austin Research Laboratory. Her current responsibilities include researching topics of importance to IBM in the areas of IC test, reliability, diagnosis and design-for-manufacturability. She has published over 10 papers in the areas of IDDQ test, test-based defect-learning, test economics and timing analysis incorporating manufacturing variability. She won the International Test Conference best paper award in 1997. She holds one U.S. patent and has several others pending. Before joining IBM, she earned a Ph.D. from Carnegie Mellon University, where she was a National Science Foundation Fellow. She is a member of the technical program committees of the IEEE International Test Conference (ITC), International Symposium on Testing and Failure Analysis and the IEEE Defect-Based Test Workshop (DBTW). Steve Groothuis - Micron Technology Inc. Steve Groothuis received a Bachelor’s in Physics (1983) from Michigan State University and Masters in Physics (1991) from the University of Texas. He began work in the Central Packaging Group, Texas Instruments in Dallas in 1983 as a Group Member of the Technical Staff performing semiconductor package development, design, testing, and simulation. Prior to leaving TI, he managed the engineering staff in TI's Advanced Semiconductor Packaging Lab. In 1997, he was a Multiphysics Industry Specialist for ANSYS Inc. defining Computer-Aided Engineering simulation software market plans, strategic accounts management, Electronics Packaging & MEMS Device Simulation initiatives, and product development for the Electronics Industry. Currently, he is Technology CAD & Analysis Manager in the Process R&D Department at Micron Technology. His responsibilities include device and process simulations for new cell designs, supporting most aspects of semiconductor package simulations, and new technology assessments. He has published over 30 papers at various conferences in semiconductor packaging, reliability, and numerical analysis. Mr. Groothuis is a Senior Member of the IEEE and has participated in ASME and JEDEC standards committees. Cheryl Hartfield – Cheryl Hartfield is a Member Group Technical Staff at Texas Instruments (Dallas). Since 1998, she has worked in Semiconductor Packaging Development (SCPD) and has focused on silicon/packaging interactions and characterization of Si material properties. Prior to this, Cheryl helped to pioneer the application of Scanning Acoustic Microscopy for the inspection of damage in packaged ICs and developed methods for TEM sample prep in TI’s first dual-beam FIB at TI’s Central Research Labs. Cheryl has authored over 15 papers and 2 book chapters and has participated within industry conferences as author, committee member, and session chair. She received B.S. and M.S. degrees in microbiology from Texas A&M (1986) and UT Southwestern Medical Center at Dallas (1989). Christopher Henderson – Chris received his B.S. in Physics from the New Mexico Institute of Mining and Technology and his M.S.E.E. from the University of New Mexico. Chris is the President and one of the founders of Semitracks Inc., a United States based company that provides education and training to the semiconductor industry. Chris also teaches courses in failure analysis, reliability and semiconductor technology for the semiconductor industry. From 1988 to 2004 he worked at Sandia National Laboratories, where he was a Principal Member of Technical Staff in the Failure Analysis Department and Microsystems Partnerships Department. His job responsibilities have included failure and yield analysis of components fabricated at Sandia’s Microelectronics Development Laboratory, research into the electrical behavior of defects, and consulting on microelectronics issues for the DoD. He has published over 20 papers at various conferences in semiconductor processing, reliability, failure analysis, and test. He has received two R&D 100 awards and two best paper awards. Prior to working at Sandia, Chris worked for Honeywell, BF Goodrich Aerospace, and Intel. Chris is a member of IEEE and EDFAS (the Electron Device Failure Analysis Society). Kultaransingh N. (Bobby) Hooghan - Hooghan Consultancy. Bobby Hooghan is the President of Hooghan Consultancy and Services, a company that provides expert consulting for focused ion beam applications. Prior to forming Hooghan Consultancy, he was a Senior Member of Technical Staff at Agere Systems until 2004. His job responsibilities included focused ion beam cross-sectioning, device modification, and TEM sample preparation. Badih El-Kareh - Process Development Manager at Texas Instruments, Dallas, presently developing advanced BiCMOS processes in Freising, Germany. Dr. El-Kareh worked previously at IBM and has 34 years experience in semiconductor device design, process integration and characterization. This includes the implementation ofCMOS, and BiCMOS technologies and devices for memory, logic, and analog applications. He is author of a book on VLSI silicon devices and a book on modern semiconductor processing technologies. He has authored or co-authored 32 papers and has 25 US patents issued. Dr. El-Kareh is a senior member of IEEE. He has 20 years experience in academic and industrial teaching. Thomas Moore – Omniprobe Inc. Dr. Moore received the Bachelors in physics (1976), Masters (1978), and Ph.D. (1980) in materials science engineering from the University of Virginia. He began work in the Central Research Labs, Texas Instruments, Dallas in 1980 as a Member of the Materials Science Labs doing semiconductor materials and device analysis. He rose to the level of Distinguished Member of the Technical Staff at TI, managing the Silicon Technology Ramp and Advanced Characterization Department at TI. He is currently the President of Omniprobe Inc. Dr. Moore is a member of the IEEE, the APS and the EMSA. Dr. Sule Ozev - Dr. Ozev received her B.S. degree in Electrical Engineering from Bogazici UniversityTurkey, and her M.S. and Ph.D. degrees in Computer Science and Engineering from University of California, San Diego in 1995, 1998, and 2002 respectively. Dr. Ozev is an assistant professor at the Electrical and Computer Engineering Department at Duke University. She is the Program Chair of IEEE North Atlantic Test Workshop (NATW) for 2005 and 2006 and the General Chair of NATW for 2007. She serves on various program committees, including IEEE International Conference on Computer-Aided Design (2005-2006), IEEE International Conference on Computer Design (2004-2006), IEEE European Test Symposium (2006-2007), and IEEE International Symposium on Defect and Fault Tolerance (2005-2006). Gay Samuelson – Gay recently retired as an engineering project manager from Intel's Assembly Technology development Q&R organization. She has also managed a Quality and Reliability analytical laboratory, pacemaker hybrid assembly production, and other products at MicroRel. Additionally she developed photovoltaic modules and liquid crystal displays for Motorola. She holds an M.S. and Ph.D. in molecular biology from the University of Wisconsin. Steven H. Voldman - Dr. Steven H. Voldman is an IEEE Fellow for "contributions in ESD protection in CMOS, Silicon On Insulator and Silicon Germanium Technology." He is presently a member of the IBM's BiCMOS RF Silicon Germanium (SiGe) and RF CMOS development team. He received his B.S. in Eng. Science from Univ. of Buffalo (1979); M.S. EE (1981) and Electrical Engineer Degree (1982) from MIT; MS Eng. Physics (1986) and Ph.D EE (1991) from Univ. of Vermont under IBM's Resident Study Fellow program. As a reliability/device engineer since 1982, his pioneering work involved bipolar and CMOS SRAM SER, MOSFET gate-induced drain leakage (GIDL), hot electron prompt shift mechanism, epitaxy/well design, CMOS latchup, and ESD. In IBM, Steve was responsible for CMOS latchup since 1984, and ESD since 1991 working in IBM's 0.8 um to 0.09 um technology. He is presently working on ESD and latchup in IBM's RF CMOS 0.18 um technology, IBM's Silicon Germanium 0.8 to 0.09 um, image processing technology, and power electronics. He has authored ESD and latchup publications in the area of MOSFET scaling, device simulation, Cu, low-k, MR heads, CMOS, SOI, SiGe and SiGeC technology. He was responsible for defining the IBM ESD and latchup strategy for CMOS, BiCMOS and RF CMOS from 1986 to 2005. Voldman served as SEMATECH ESD Working Group Chairman (1996-2000), EOS/ESD Symposium TPC, Vice Chair, and General Chair (2002); and presently serving as IRPS ESD/Latchup Chairman 2003-005, ESD Association Latchup Subcommittee Chair 2005, ESD Assoc. Board of Directors, ESD TLP Work Group Standards Chairman, ESD Technology Roadmap Committee, ESD Education Committee Asian University Liason, ESD on Campus Chairman, as well as serving on the technical. program steering committee of Taiwan Electrostatic Discharge Conference, International Conference on Electromagnetic Compatibility (ICEMAC, Taipei, Taiwan), Bipolar Circuit Technology Meeting (BCTM), and International Physical and Failure Analysis (IPFA) Symposium (Singapore); Steve has provided tutorials as well as have given invited talks to the MIT Lecture Series, University of Vermont, University of Illinois Urbana-Champaign (UIUC), Nanyang Technical University (NTU-Singapore), and National Chiao-Tung University (NCTU- Taiwan). He is a recipient of his 140th issued US patents and 60 pending, over 125 publications, and additionally, he has been recently highlighted in August 22nd 2002 EE Times, Scientific American, Pour La Science and Intellectual Property Law and Business. Dr. Voldman is an author of the book ESD: Physics and Devices, a new text ESD: Devices and Circuits, as well as a contributing author to the book Silicon Germanium: Technology, Modeling and Design. As a reliability/device engineer since 1982, his pioneering work involved bipolar and CMOS SRAM SER, MOSFET gate-induced drain leakage (GIDL), hot electron prompt shift mechanism, epitaxy/well design, CMOS latchup, and ESD. In IBM, Steve was responsible for CMOS latchup since 1984, and ESD since 1991 working in IBM’s 0.8 um to 0.09 um technology. He is presently working on ESD and latchup in IBM’s RF CMOS 0.18 um technology, IBM’s Silicon Germanium 0.8 to 0.09 um, image processing technology, and power electronics. He has authored ESD and latchup publications in the area of MOSFET scaling, device simulation, Cu, low-k, MR heads, CMOS, SOI, SiGe and SiGeC technology. He was responsible for defining the IBM ESD and latchup strategy for CMOS, BiCMOS and RF CMOS from 1986 to 2005. Voldman served as SEMATECH ESD Working Group Chairman (1996-2000), EOS/ESD Symposium TPC, Vice Chair, and General Chair (2002); and presently serving as IRPS ESD/Latchup Chairman 2003-005, ESD Association Latchup Subcommittee Chair 2005, ESD Assoc. Board of Directors, ESD TLP Work Group Standards Chairman, ESD Technology Roadmap Committee, ESD Education Committee Asian University Liason, ESD on Campus Chairman, as well as serving on the technical. program steering committee of Taiwan Electrostatic Discharge Conference, International Conference on Electromagnetic Compatibility (ICEMAC, Taipei, Taiwan), Bipolar Circuit Technology Meeting (BCTM), and International Physical and Failure Analysis (IPFA) Symposium (Singapore); Steve has provided tutorials as well as have given invited talks to the MIT Lecture Series, University of Vermont, University of Illinois Urbana-Champaign (UIUC), Nanyang Technical University (NTU-Singapore), and National Chiao-Tung University (NCTU- Taiwan). He is a recipient of his 140th issued US patents and 60 pending, over 125 publications, and additionally, he has been recently highlighted in August 22nd 2002 EE Times, Scientific American, Pour La Science and Intellectual Property Law and Business. Dr. Voldman is an author of the book ESD: Physics and Devices, a new text ESD: Devices and Circuits, as well as a contributing author to the book Silicon Germanium: Technology, Modeling and Design. Carl Zweben - Dr. Zweben, now an independent consultant, directed development and application of advanced thermal management and packaging materials for over 30 years. He was formerly Advanced Technology Manager and Division Fellow at GE Astro Space, where he directed the Composites Center of Excellence, and was the first to use Al/SiC. Other affiliations have included Du Pont, Jet Propulsion Laboratory and the Georgia Institute of Technology NSF Packaging Research Center. Dr. Zweben was the first, and one of only two winners of both the GE One-in-a-Thousand and Engineer-of-the-Year awards. He is a Fellow of ASME, ASM and SAMPE, an Associate Fellow of AIAA, and has been a Distinguished Lecturer for AIAA and ASME. He has published and lectured widely.
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