Instructor: Dr. Vesselin Vassilev

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Course Overview

Electrostatic discharge (ESD) costs the semiconductor industry over $4 billion (USD) a year. This problem is likely to grow in the future as smaller devices are susceptible to damage at lower static voltages and latchup under more subtle conditions. Today, circuit designers and process integration engineers must have a fundamental knowledge of device physics and electrothermal behavior of I/O structures in order to develop a process that is robust and can withstand the challenges of today’s varied IC fielding environments. Layout, ESD pulse behavior, semiconductor physics, and device modeling are all required to produce a successful product. The industry needs competent engineers and scientists to help achieve these goals. ESD Design and Technology is a 3 day course that offers detailed instruction on a variety of subjects pertaining to ESD design and technology. This course is designed for every manager, engineer, and technician concerned with ESD at the I/O design or chip level or supplying ESD tools and simulators to the industry.

The approach of this 3-day intensive ESD reliability training is to teach attendees to develop their own solutions rather than applying pre-defined design receipts. The training is aiming along developing a good understanding about:

• The different ESD events relevant to the ESD design specifications- HBM,CDM, IEC
• The methodologies to develop custom ESD solutions from component to chip-PCB design levels in different semiconductor technologies and for different design applications - digital, RF, mixed signal and high -voltage
• The use of CAD simulation tools to design and optimize new ESD components and circuits
• ESD design and review work flow and how to develop and use ESD design verification rules
• Methods and hardware for ESD testing and product qualification
• Principles and approaches for ESD failure troubleshooting on IC level In addition to the lectures on the above topics, real-time demo and discussions on common problems are planned thus giving the attendees the possibility to interact wit their colleagues and the lecturer, and possibly find solution to their specific design problems.

Participants learn to develop the skills to determine what constitutes a good ESD design, how to recognize devices that can reduce ESD susceptibility, and how to design new ESD structures for a variety of technologies.

Course Objectives

1. The seminar will provide participants with an in-depth understanding of the ESD failure mechanism, test structures, equipment, and testing methods used to achieve robust ESD resistance in today’s components.
2. Participants will be able to gather ESD data, determine how best to plot the data, and make inferences from that data.
3. The seminar will identify the major issues associated with ESD and explain how they occur, how they are modeled, and how they are mitigated.
4. The seminar can be offered with several textbooks that cover the topic of ESD in much greater detail. The course author is a recognized expert in the field and has written the definitive textbook series on ESD.
5. Participants will be able to identify basic ESD structures and how they are used to help reduce ESD susceptibility on semiconductor devices.
6. Participants will be able to knowledgeably design ESD structures that are appropriate to assure the robustness of a component.
7. Participants will be able to identify appropriate tools to purchase when starting or expanding ESD test capabilities.

Instructional Strategy

By using a combination of instruction by lecture, written text material, problem solving and question/answer sessions, participants will learn practical approaches to the failure analysis process. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. Our instructors are internationally recognized experts in their fields and have years of both current and relevant experience. The textbooks offer hundreds of pages of additional reference material participants can apply during their daily activities.

Course Outline

Educational Materials

$300 combined value... free with the price of registration!

ESD: Physics and Devices

By Steven H. Voldman

This volume is the first in a series of three books addressing Electrostatic Discharge (ESD) physics, devices, circuits and design across the full range of integrated circuit technologies. ESD Physics and Devices provides a concise treatment of the ESD phenomenon and the physics of devices operating under ESD conditions. Voldman presents an accessible introduction to the field for engineers and researchers requiring a solid grounding in this important area. The book contains advanced CMOS, Silicon On Insulator, Silicon Germanium, and Silicon Germanium Carbon. In addition it also addresses ESD in advanced CMOS with discussions on shallow trench isolation (STI), Copper and Low K materials.

• Provides a clear understanding of ESD device physics and the fundamentals of ESD phenomena.
• Analyses the behaviour of semiconductor devices under ESD conditions.
• Addresses the growing awareness of the problems resulting from ESD phenomena in advanced integrated circuits.
• Covers ESD testing, failure criteria and scaling theory for CMOS, SOI (silicon on insulator), BiCMOS and BiCMOS SiGe (Silicon Germanium) technologies for the first time.
• Discusses the design and development implications of ESD in semiconductor technologies.

An invaluable reference for EMC non-specialist engineers and researchers working in the fields of IC and transistor design. Also, suitable for researchers and advanced students in the fields of device/circuit modelling and semiconductor reliability.

ESD: Cicuits and Devices

By Steven H. Voldman

ESD Circuits and Devices provides a clear insight into the layout and design of circuitry for protection against electrical overstress (EOS) and ESD. With an emphasis on examples, this text:

• explains ESD buffering, ballasting, current distribution, design segmentation, feedback, coupling, and de-coupling ESD design methods;
• outlines the fundamental analytical models and experimental results for the ESD design of MOSFETs and diode semiconductor device elements, with a focus on CMOS, silicon on insulator (SOI), and Silicon Germanium (SiGe) technology;
• focuses on the ESD design, optimization, integration and synthesis of these elements and concepts into ESD networks, as well as applying within the off-chip driver networks, and on-chip receivers; and
• highlights state-of-the-art ESD input circuits, as well as ESD power clamps networks.

Continuing the author’s series of books on ESD, this book will be an invaluable reference for the professional semiconductor chip and system ESD engineer. Semiconductor device and process development, quality, reliability and failure analysis engineers will also find it an essential tool. In addition, both senior undergraduate and graduate students in microelectronics and IC design will find its numerous examples useful.

Instructor Profile

Dr. Vesselin Vassilev

Dr. Vesselin Vassilev has more than 12 years of experience in the area of ESD technology and the design of IC devices developing his career both in academia and industry.  He holds a Master of Applied Physics Degree from the University of Plovdiv, Bulgaria, and a Ph.D. Degree in Electrical Engineering from the Catholic University of Leuven,Belgium.  Following his formal education, Dr. Vassilev held career positions related to ESD at IMEC in Belgium and at Texas Instruments in Dallas Texas.  In 2009, he founded Novorell Technologies to develop ESD EDA software solutions and provide ESD design consultancy services to companies worldwide.  Dr.Vassilev has contributed to more than 40 publications and 2 patents on ESD related topics. He is presently acting as the General Chair for the 2010 EOS/ESD Symposium, to be held October 3-8, 2010 in Reno, NV, USA (http://www.esda.org/symposia.html).