Instructor: Jim A. Fraser

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Refund Policy: If a course is canceled, refunds are limited to course registration fees. Registration within 21 days of the course is subject to $100 surcharge.

Course Overview

Due to countless breakthroughs and developments in wafer fab processing, today's semiconductor wafer fabrication process contains some of the most intricate procedures developed by humankind. Semitracks' 4-day Wafer Fab Processing course looks in-depth at the semiconductor manufacturing process and individual processing technologies.

What Will I Learn By Taking This Class?

By focusing on the basics of each processing step and the issues surrounding next-generation devices, you'll learn why certain techniques are preferred over others. Additionally, you'll learn basic but powerful information about the wafer fabrication process.

This skill-building series is divided into three segments:

1. Basic Semiconductor Wafer Processing Steps. Each processing step addresses a specific need in IC creation. You'll learn the fundamentals of each processing step and why it is used in the industry today.
2. The Evolution of Each Processing Step. It is important to understand how wafer fab processing came to the point where it is today. You'll learn how each technique has evolved for use in previous and current generation ICs.
3. Current Issues in Wafer Fab Processing. You'll learn how wafer fab processing equipment is increasingly constrained by physics and materials science. You'll also learn how new materials in the fabrication process may create future problems for silicon wafer manufacturing.

This course is a must for every manager, engineer, and technician working in the semiconductor industry, using semiconductor components, or supplying tools to the industry. Our instructors work hard to explain how semiconductor wafer processing works without delving heavily into the complex physics and mathematical expressions that normally accompany this discipline.

Course Objectives

1. The seminar will provide participants with an in-depth understanding of the semiconductor fabrication industry's technical issues.
2. Participants will understand the fundamental wafer fab processing steps.
3. The seminar will identify the key issues related to each processing technique. Additionally, participants should be able to describe how wafer fabrication technique limitations affect the continued scaling of the semiconductor industry.
4. Through working sample problems, participants will gain hands-on knowledge of wafer fab processing fundamentals.
5. Participants will be able to identify the features and principles associated with each major processing step, including chemical vapor deposition, ion implantation, lithography, and etching.
6. Participants will understand the interrelations of processing, reliability, power consumption, and device performance.
7. Participants will be able to decide how to construct and evaluate processing steps for CMOS, BiCMOS, and bipolar technologies.

Course Outline

1. Introductions and Basics
   1. Common Industry Terminology
   2. Semiconductor Materials
   3. Electrical Conductivity
   4. Semiconductor Devices
   5. Classification of ICs & IC Processes
   6. The Global Market for Semiconductors
   7. Other Microelectronics Sectors
   8. Vacuum Basics
   9. Thin Film Basics
   10. Plasma Basics
2. Silicon Substrates
   1. Crystallinity
   2. Crystal Defects
   3. Si Crystal Growth & Wafer Prep
3. Basic CMOS Process Flow
   1. Step-by-Step FEOL Processing
   2. Step-by-Step BEOL Processing
   3. Parametric Testing
   4. Process Evolution
4. Ion Implantation
   1. Role & Importance of Doping
   2. Dopant Profiles
   3. Crystal Damage & Annealing
   4. Ion Implant Equipment
   5. Process Challenges
   6. Process Monitoring & Characterization
   7. New Techniques
5. Thermal Processing
   1. Overview of Thermal Processing
   2. Process Applications of SiO2
   3. Thermal Oxidation
   4. Thermal Oxidation Reaction Kinetics
   5. Oxide Quality
   6. Thermal Diffusion Atomistic Models & Kinetics
   7. Thermal Annealing
   8. Hardware
   9. Process Control
6. Contamination Monitoring & Control
   1. Contamination Forms & Effects
   2. Contamination Sources & Control
   3. Contamination Monitoring & Characterization
7. Wafer Cleaning
   1. Wafer Cleaning Strategies
   2. Chemical Cleaning
   3. Mechanical Cleaning
8. Chemical Vapor Deposition (CVD)
   1. Basic CVD Process
   2. LPCVD Films & Process Applications
      • Silicon Nitride
      • Polysilicon
      • Epitaxial Silicon
   3. LPCVD/Epi Equipment
   4. PECVD Films & Process Applications
      • Silicon Nitride
      • Silicon Oxide
      • Silicon Oxynitrides
      • Tungsten
      • Refractory Metal Silicides & Nitrides
      • Low-k & High-k Dielectrics
   5. PECVD Equipment
   6. Step Coverage
9. Physical Vapor Deposition (PVD)
   1. PVD Basics
   2. Sputter Deposition Process
   3. Sputter Deposition Equipment
   4. Historical Importance of Al-Based Films
   5. Step Coverage and Contact/Via Hole Filling
   6. Metal Film Evaluation
10. Lithography
    1. Basic Lithography Process
    2. Photoresist Materials
    3. Photoresist Process Flow
    4. Photoresist Processing Systems
    5. Basic Optics
    6. Image Formation
    7. Actinic Illumination
    8. Imaging Tools
    9. Registration
    10. Photomasks
    11. Resolution Enhancement Techniques
    12. The Evolution of Optical Lithography
11. Etch
    1. Etch Basics & Terminology
    2. Wet Etch Chemistries & Limitations
    3. Types of Dry Etch Processes
    4. Physics & Chemistry of Plasma Etching
    5. Dry Etch Applications
       • Silicon Oxides
       • Polysilicon
       • Al & Al Alloys
       • Photoresist Strip
       • Silicon Nitride
       • low-k Dielectrics
    6. Equipment
12. Chemical-Mechanical Planarization
    1. Planarization & CMP Basics & Fundamentals
    2. CMP Processes
       • Metals
       • Dielectrics
    3. Process Challenges
    4. Equipment
    5. Process Control
13. Copper Interconnect, Low-K Inter-Metal Dielectrics (IMD)
    1. Limitations of “Conventional” Interconnect
    2. Copper Interconnect
    3. Cu Electroplating
    4. Damascene Structures
    5. Low-k IMDs
    6. Cleaning Cu and low-k IMDs
14. Leading Edge Technologies & Techniques
    1. Process Evolution
    2. Atomic Layer Deposition (ALD)
    3. High-k Gate and Capacitor Dielectrics
    4. Ni Silicide Contacts
    5. Metal Gates
    6. Silicon on Insulator (SOI) Technology
    7. Strained Silicon
    8. Hard Mask Trim Etch
    9. New Doping Techniques (e.g., Plasma, GILD)
    10. New Annealing Techniques (e.g., Flash, SPE)
    11. Other New Techniques
    12. Summary of Industry Trends

Course Outline

Educational Materials

Microchip Manufacturing

By Stanley Wolf

Text provides an introduction to microchip manufacturing for undergraduate students and those in technician-training programs. Includes index, glossary, chapter summary, and problems. Fully illustrated in color. DLC: Integrated circuits -- Very large scale integration -- Design and construction.

Instructional Strategy

Our courses are dynamic. We use a combination of instruction by lecture, problem solving, and question/answer sessions to give you the tools you need to excel. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. The course notes offer hundreds of pages of reference material that you can apply during your daily activities. Additionally, the opportunity to work through sample problems under the guidance of an expert instructor allows you to cement the concepts you learn through hands-on implementation.

Our instructors are internationally recognized experts. Our instructors have years of current and relevant experience in their fields. They're focused on answering your questions and teaching you what you need to know.

Instructor Profile

Jim Fraser

Jim Fraser received a Bachelor’s degree in Physics from McGill University in Montréal, Québec, Canada. He has 22 years experience in semiconductor manufacturing, at Nortel Networks and STMicroelectronics. As a Process Engineer, Process Engineering Section Manager, and then Process/Device Engineering Manager, he has worked directly and intimately with CMOS and BiCMOS wafer fab processes. He has taught semiconductor manufacturing technology at Algonquin College and most recently at the University of Ottawa in Ottawa, Ontario.