2005 July Newsletter
Volume 1, Issue 4
1. Special Event at Semicon West - Registration Closes Friday Evening!
Dr. John Suehle and Dr. Ennis Ogawa - Reliability and Characterization Challenges for Advanced Semiconductor Devices Monday, July 11 (9:00 AM - 5:00 PM) at The City Club of San Francisco
Semitracks, along with Semiconductor International, have put together a one-day course on the Reliability and Characterization Challenges for Advanced Semiconductor Devices. Dr. John Suehle of the National Institute of Standards and Technology and Dr. Ennis Ogawa of Texas Instruments, two leading researchers and lecturers in field of Semiconductor Reliability, will give an overview of the problems and reliability challenges associated with today's advanced semiconductor devices. Dr. Suehle will cover front-end reliability issues including: Hi-K dielectrics, Negative Bias Temperature Instability, and Positive Bias Temperature Instability. Dr. Ogawa will cover back-end reliability issues including: copper metallization, electromigration, stress induced voiding, and Lo-K dielectric breakdown. The course will be held at the City Club San Francisco on Monday, July 11 from 9 AM to 5 PM with an hour and a half lunch break. To register for this unique event, click here.
2. Upcoming Conferences
July 12-14, 2005 Moscone Center, San Francisco, CA
We will be located in West Hall, Level 2, Booth #8719 (diagonally opposite Panasonic Factory Automation). We are part of the Final Manufacturing portion of the show.
International Symposium for Testing and Failure Analysis
November 6-10,2005 San Jose Convention Center in San Jose, CA
3. Course Schedule
Invest in yourself and your staff. Time is running short to enroll in our Spring courses on Semiconductor Reliability, Failure and Yield Analysis, FIB Technology, and Packaging. Come and learn from the experts!
Process Integration is becoming more challenging with each technology node. The fortunes of your company may depend on how successfully you and your team can integrate disparate processing steps into a single, optimized flow. Lily Springer, our expert in Process Integration and Mixed Signal Design, guides you through the critical and challenging aspects of this topic. She covers both digital and analog issues related to process integration. Let your colleagues know!!
Semiconductor Process Integration (October 10-12) – San Diego, California
Failure and Yield Analysis
Are you new to failure analysis? Does your position require you to have an understanding of failure analysis? Learn about the latest techniques for analyzing complex devices. We cover all the techniques from the simple ones (such as Liquid Crystal) all the way to complex ones (such as PICA and Laser Voltage Probing). Learn the secrets of analyzing a component right every time.
Failure and Yield Analysis (September 12-15) – Singapore
Failure and Yield Analysis (September 19-22) – Santa Clara, California
Reliability is a critical element to the success of any semiconductor product. Reliability margins are increasingly squeezed by today’s deep submicron technologies. Learn about the major reliability failure mechanisms, test structures, and test equipment. Learn how to optimize reliability, performance, and cost.
Semiconductor Reliability (September 26-28) – Santa Clara, California
We offer other courses as well as in-house courses. For more information, visit our website at http://www.semitracks.com.
4. Semitracks Segment of the Month
Semitracks’ new and improved online training is convenient, up-to-date, and cost effective. Access the same material presented in our courses whenever you need it, right when you need it without having to worry about the high costs and hassle of traveling. The semiconductor field is an ever-changing one. With access to the most current information, you can stay on top of the new technology. Online training is also very cost effective. For only $500 per year, you gain access to thousands of dollars worth of courses and course material.
Give our online training a try – for free. This month’s topic is Transistor Isolation Schemes.
Transistor isolation is key to cramming more transistors on a single chip. The two leading isolation schemes are LOCOS (LOCal Oxidation of Silicon) and STI (Shallow Trench Isolation).
This segment is no longer available. If this topic interests you, perhaps you would be interested in our Online Training. For more information or to sign up, click here.
5. Technical Tidbits
Thermoreflectance Laser Probing
The thermoreflectance technique exploits the temperature dependent reflection coefficient for generating surface thermal measurements. The advantage of this technique is that one can obtain a lateral resolution equivalent to the wavelength of light being used to image the device. Resolving the reflection to an accuracy level fine enough to sense small changes in temperature is the challenge with this technique. Most materials have a change in reflectance on the order of 1.0×10-5 per degree centigrade. By active modulation of the device at a known frequency by a narrow bandwidth filtering of the reflected light, one can reduce shot noise, thermal noise, and 1/f noise to produce a more accurate image.
6. Our Mission
Education and Training for the Electronics Industry
Semitracks provides education, training, and certification services and products for the electronics industry. We specialize in serving Semiconductor, Microsystems and Nanotechnology suppliers and users. Semitracks Inc. helps engineers, technicians, scientists, and management understand these dynamic fields. We offer courses in Semiconductor Reliability, Test, Packaging, Process Integration, Failure and Yield Analysis, and Focused Ion Beam technology. Learn from the Experts.