LIVA Figures

LIVA image of an entire die taken with a 633 nm, 5 mW HeNe laser. The LIVA signals from open-circuited junctions are highlighted by arrows. (Courtesy Sandia Labs).




Combined LIVA and reflected light image showing the field of view in Fig.1. (Courtesy Sandia Labs).




Combined LIVA and reflected light image showing the signal in Fig. 1 at higher magnification. (Courtesy Sandia Labs).




Combined CIVA and secondary electron image at about the same field of view as Fig. 3 confirming that the LIVA signal is associated with open conductors. (Courtesy Sandia Labs).




Image showing LIVA logic map of cell rows. (Courtesy Sandia Labs).




LIVA difference image between two different states. (Courtesy Sandia Labs).




Reflected light image for registration of Figs. 5 and 6. (Courtesy Sandia Labs).




Backside IR LIVA image of a SRAM with an open input, taken with an 1152 nm, 5 mW HeNe laser. (Courtesy Sandia Labs).




Reflected IR image of the SRAM with an open input. (Courtesy Sandia Labs).




Same as Fig. 8 but at higher magnification. (Courtesy Sandia Labs).




Same as Fig. 9 but at higher magnification. (Courtesy Sandia Labs).




Backside IR LIVA image of an SRAM with ESD damage in an input circuit. (Courtesy Sandia Labs).




Reflected IR image of the SRAM with ESD damage in an input circuit. (Courtesy Sandia Labs).




Exposed die backside in an epoxy encapsulated DIP. The lead extensions enable LIVA analysis. (Courtesy Sandia Labs).




Backside IR LIVA of a microcontroller with open contacts. (Courtesy Sandia Labs).




Reflected IR image of the microcontroller with open contacts. (Courtesy Sandia Labs).




Same as Fig. 15 but at higher magnification. (Courtesy Sandia Labs).




Same as Fig. 16 but at higher magnification. (Courtesy Sandia Labs).




Backside IR LIVA logic map of a microcontroller I/O structure at a logical "1" using a 1064 nm, 120 mW Nd:YAG laser. (Courtesy Sandia Labs).




Backside IR LIVA difference image between a "1" and "0" state. (Courtesy Sandia Labs).




A reflected light image for registration for Figs. 19 and 20. (Courtesy Sandia Labs).




Backside IR LIVA image of an SRAM in a microcontroller. (Courtesy Sandia Labs).




Reflected IR image of the SRAM in the microcontroller. (Courtesy Sandia Labs).




IR LIVA image displaying a portion of an SRAM cell with the p-channel transistor gates highlighted. Box outlines SRAM cell. (Courtesy Sandia Labs).




Reflected IR image displaying the portion of the SRAM cell shown in Fig. 24. (Courtesy Sandia Labs).




Four panel image showing LIVA and a registered IR reflected image on a microprocessor. (Courtesy Sandia Labs).




Another four panel image showing LIVA and a registered IR reflected image on the same microprocessor. (Courtesy Sandia Labs).




Four panel image showing LIVA and a registered IR reflected image on a microprocessor at low magnification. (Courtesy Sandia Labs).




Four panel image showing LIVA logic state mapping and a registered IR reflected image on a microprocessor. (Courtesy Sandia Labs).




Another four panel image showing LIVA and a registered IR reflected image on a microprocessor. (Courtesy Sandia Labs).




Four panel image showing LIVA and a registered IR reflected image on a microprocessor. (Courtesy Sandia Labs).