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2016 August Newsletter

Feature Article | Technical Tidbit | Ask the Experts | Upcoming Conferences | Course Spotlight | Upcoming Courses | Feedback

Issue 112

August 2016

InfoTracks

Semitracks Monthly Newsletter

Feature Article - Hybrid Microcircuit Packaging, Part 1 - By Christopher Henderson

In this section, we’ll provide an overview of hybrid microcircuit packaging. Although this technology may seem old to many viewers, hybrid microcircuits are still used extensively in military and space applications.

Popular in the 1970s and 1980s, hybrid microcircuits (Figure 1) are still common in many military applications. Hybrid microcircuits are composed of multiple technologies like resistors, capacitors, and integrated circuits. They have several distinct advantages for high reliability and extreme environments. They can be hermetically sealed to keep out moisture, and can be made using materials and processes that permit operation over a wider temperature range than plastic encapsulated microcircuits. Hybrid microcircuits can be manufactured with thick film or thin film technology, and can be formed to create leads for surface mount or pins for through-hole mount.

Figure 1, Hybrid microcircuits.

Let’s begin by looking at the materials used in thick film and thin film hybrid microcircuits (Figure 2). The elements of interest would be electrodes, a metal that makes contact to a non-metallic part of the hybrid, terminals that make contact to other metals, interconnect layers, resistors, and dielectric layers. There are thick film materials to do these functions as well as thin film materials. We’ll begin with thick film materials.

Figure 2, Thick/thin film packaging materials.

Thick film materials typically create layers greater than 25 microns thick. Silver and gold-based materials are common for conductors. Silver, silver-palladium, or silver-palladium-platinum pastes are used in a screening technology to create conductive traces on the substrate (Figure 3). These materials require an 850°C firing temperature to bond the material to the substrate. Gold-based materials are also common; however, the cost of gold is making this approach more expensive. Gold-platinum and gold-palladium-platinum are also quite expensive. The firing temperature is a few degrees higher than for that of silver. There are also some thick film dielectric materials. Many of these are proprietary, though.

Figure 3, Thick film packaging materials.

Thin film technology is manufactured differently than thick film technology hybrids (Figure 4). A thin film technology hybrid uses layers that are between 0.1 and 5 microns; therefore, the substrate must be extremely flat and uniform. This requires a fine-grained material like alumina, aluminum nitride or quartz. Sometimes they are polished to create a flatter, more uniform surface. The SEM image on the right shows an example of a small-grained, flat substrate. Thin film layers can be vacuum deposited through evaporation, or they can be sputtered. Numerous metals and metal alloys can be sputtered on a substrate. Some of the common ones are listed here. Metals can also be plated as well. Gold, nickel, and copper can be vacuum deposited or deposited through electroless deposition.

Figure 4, Thin film packaging materials.

There are three common substrate types: aluminum oxide or alumina, beryllium oxide, and aluminum nitride. Alumina is the most common substrate. It has a coefficient of thermal expansion that is relatively low, and it is inexpensive to manufacture. Figure 5 shows some of the common properties of alumina. Beryllium oxide has some nice properties—including a higher thermal conductivity—but beryllium is toxic. Therefore, special handling procedures are required. Many electronics manufacturers do not want to deal with the liability of beryllium, so it is not commonly used anymore. A substitute for beryllium oxide is aluminum nitride. It has a higher thermal conductivity, and better-matched coefficient of thermal expansion to silicon. As a result, it is receiving more attention.

Figure 5, Alumina.

Let’s move on and discuss resistors (Figure 6). Resistors are a common element within a hybrid microcircuit. They can be made using thick or thin film technologies. Lower resistance thick film resistors (a) are made of conductive metals, while higher resistance elements can be made from ruthenium oxide and other materials. These materials are typically deposited on alumina substrates. Thin film resistors (b) can be made from nickel alloys, nichrome, nichrome and tantalum pentoxide stacks, tantalum nitride, and other materials. The substrates are typically silicon dioxide or quartz. Thin film resistors can be made with top contacts for wirebonding, or with back contacts for better high frequency performance.

Figure 6, Thick/thin film resistors.

Capacitors are another common element in a hybrid microcircuit. Capacitors can also be made with thick and thin film technologies (Figure 7). Thick film capacitors (a) are typically made from ceramic or tantalum with electrodes at either end for connection, while thin film capacitors (b) are made using an aluminum-silicon dioxide-silicon, or MOS structure. They can also be made as metal-insulator-metal structures. Thin film capacitors are typically wirebonded.

Figure 7, Thick/thin film capacitors.

Technical Tidbit - Laser Dicing

A newer method for singulation is the laser dicing method. Laser dicing uses a high-powered laser to either melt, cut, or initiate stress to facilitate singulation of individual dice.

There are three ways one can use lasers during the singulation, or dicing steps. The first is to use the laser in lieu of a traditional saw blade method. Here, the laser cuts through the entire silicon wafer. The second is to use the laser to create a groove, or trench, through the thin film layers and into the silicon to prevent delamination. The third is to use the laser to initiate a crack interface through the silicon, a technique referred to as stealth dicing.

Delamination, or thin-film peeling, can be a problem with standard saw blade dicing when the chip uses low-k dielectrics. Laser grooving, which has no mechanical load, can be used to achieve high-quality processing with minimal delamination, thereby contributing to higher yield and improved reliability. The process is a two-step process. First, one uses the laser to cut a wide trench groove through the top thin films and into the silicon. This surface transforms into a melted edge through the low-k dielectrics, essentially sealing them to inhibit delamination. Second, one uses a thinner saw blade to cut through the remaining silicon in the middle of the groove.

Stealth dicing uses a 1064nm Nd:YAG laser to induce defects along the interface to be broken. The laser can initiate defects along interfaces at a rate of approximately 1 meter per second, so it is quite fast. Once the laser generates the defects, one can use the expansion of an adhesive material beneath the wafer to initiate cracking along the defect-laden interface, fracturing the wafer. Stealth dicing does not require cooling, and does not require a large kerf, leading to the potential for more product die per wafer. This process also generates very little debris. One can also perform the stealth dicing step in conjunction with the laser groove step to minimize delamination problems with low-k dielectrics.

Laser initiated defects (Left), before adhesive material expansion (upper right), after adhesive material expansion (lower right).

Ask the Experts

Q: Package warping is becoming a big problem. Is there a JEDEC standard for package warping?

A: There are a couple of standards associated with package warping - JESD22-B112 and SPP-024A. JESD22-B112 was issued in 2005. However, this standard just discusses the techniques for measuring warpage. However, there is no general standard for what constitute an acceptable amount of warpage. For BGA device warpage, there is a JEDEC Standard Procedures and Practices document (SPP-024A) that is part of JEDEC Publication 95 (JEP-95). Tables 1 and 2 within the document give specifications in terms of ball pitch and ball height.

Upcoming Conferences

Course Spotlight - Semiconductor Reliability and Product Qualification

Please visit http://www.semitracks.com/courses/reliability/semiconductor-reliability-and-product-qualification.php to learn more about this exciting course!

Upcoming Courses

(Click on each item for details).

Semiconductor Reliability and Product Qualification on September 12-15, 2016 (Mon.-Thurs.) in San Jose, CA, USA

Introduction to Processing on January 5-6, 2017 (Thurs.-Fri.) in Shanghai, China

Feedback

If you have a suggestion or a comment regarding our courses, online training, discussion forums, reference materials, or if you wish to suggest a new course or location, please feel free to call us at 1-505-858-0454, or e-mail us at info@semitracks.com.

To submit questions to the Q&A section, inquire about an article, or suggest a topic you would like to see covered in the next newsletter, please contact Jeremy Henderson by e-mail (jeremy.henderson@semitracks.com).

We are always looking for ways to enhance our courses and educational materials.

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