In this section we will discuss time domain reflectometry. Time Domain Reflectometry, or TDR, is a technique finding increased use as a fault localization tool for devices with more complex packaging, such as wafer chip scale packaging, stacked packages, and devices with substrates or interposers. First we’ll discuss the hardware and components associated with Time domain reflectometry. Next, we’ll discuss the waveforms and how one can calculate a distance to an open or resistive change. We’ll then discuss how to interpret the waveforms produced by TDR. Last, we’ll introduce electro-optical TDR and describe how it can improve interpretation and localization of failures.
Time domain reflectometry is a technique that is becoming more common as a failure analysis technique. It is an electrical technique and is non-destructive. In time domain reflectometry, or TDR, an oscilloscope with a pulse shaper generates an electrical pulse. This pulse travels through the cabling to the package of the device under test. At the various material interfaces and corners, there will be some amount of reflection and transmission. A well-matched interface should have very little reflection, while a poorly matched interface would have a large reflection. In theory, the return waveform from an open solder bump, for instance, should show up as a marked change from the waveform through a good solder bump. The key challenge with this technology is resolution, interpretation, and integration with the design files.
Figure 1 shows an example of a time domain reflectometry setup for failure analysis work. The computer on the right drives the Tektronix digital sampling oscilloscope, shown on the lower left. The module with the silver-colored cable connects to the small blue box to generate the picosecond pulse width needed for the generated pulse, while the module connected to the copper-colored cable is the sampling head for the reflected signal. The yellow cable propagates the signal to the device under test.
Figure 2 shows a closer view of the TDR probe. In this configuration, the probe is mounted to a micromanipulator head for precise positioning over a lead, pad, or bump. The device under test is mounted to a glass slide to provide isolation from the stage, leading to a more accurate signal. The two black heads near the microscope objective are simply for lighting the sample more clearly.
Before discussing TDR waveforms let’s briefly review the electrical waveform behavior at interfaces. If you recall from basic electronics or electricity and magnetism, a waveform will react at an interface between two different impedances by generating a transmitted component and a reflected component. The closer the impedances between the two materials, the larger the transmitted component will be. The more different the impedances, the larger the reflected component will be. For instance, at the cable to solder bump interface the match is only fair, so there will be a transmitted component and a reflected component. At the solder bump to pad interface the match might be better, so there is less of a reflected component. If, however, there is an open between the solder bump and the pad trace, the impedance is much different, leading to a mostly reflected component. This shows up as a difference in the waveform like we see on the right in Figure 3.
Let’s discuss the waveforms in more detail. Figure 4 (left) is an example of the waveform from a good device. The red trace represents the waveform from the probe when disconnected from the device. We see a waveform that steps up abruptly at just under 100 psec. This indicates that the pulse is completely reflected and returns to the oscilloscope around 100 psec after launch. The blue and green waveforms show the device under test and a comparison or golden unit. Note that the waveforms are very similar. There is an initial sharp rise that matches the red trace — this is related to the mismatch at the solder bump/probe interface. The slower rise associated with blue and green waveforms comes from multiple minor reflections at various interfaces and corners within the package up to the transistors in the I/O circuitry.
In Figure 4 (right) we show a comparison device, the blue signal, and a failing device, the brown signal. We position the first cursor just beyond the minimum signal point after the initial reflection from the probe/device package interface in the comparison device. We then position the second cursor just beyond the minimum signal point in the blue waveform. There is obviously some guesswork to this placement; it is not an exact science. The difference in the times will be used to calculate the distance to the defect.
Once the engineer captures the signal and establishes a time difference, he or she must relate that time difference back into a distance to establish where the open or change in resistance might be. The distance to the defect in millimeters can be calculated by
where c is the speed of light in meters per second, Δt is the estimated time difference calculated from the waveforms, and ε is the dielectric constant of the material. Different materials have different dielectric constants, so one needs to take this variable into account. We show some example materials and their dielectric constants in Table 1. As an example calculation, a Δt of 50 psec gives a distance to the open of 3.71mm in a fiberglass substrate.
In next month’s article, we’ll discuss how to interpret TDR signals, and a new form of TDR called Electro-Optical TDR.
The construction of a composition resistor is straightforward to understand. One uses machinery to hot press a cylinder of graphite and organic binders. One embeds leads in both ends of the graphite, the resistive material. The component is then covered in a thermoset polymer package and cured to create a solid cylinder-shaped component. These devices are not precise, and engineers typically use them in circuits where lower precision is acceptable. A composition resistor typically is only accurate to about 10% of its intended resistance value.
The image at the upper left shows an example of a typical composition resistor. The colored bands indicate the resistance value of the component. For more information on how to interpret the color bands, the reader show access IEC Standard 60062. There is also information on this topic at a number of websites, including Wikipedia. Most components contain four bands to list the first and second significant digits, the multiplier, and the tolerance. This component is a military component and has 5 bands; the fifth band indicates the failure rate. This particular component is a 1 megaohm resistor (red – which represents a “one” for the first significant bit, brown – which represents a “zero” for the second significant bit, blue – which represents the “six” for the 10 to the 6 multiplier, and gold – which represents a 5% tolerance. The image at the lower right shows a cross-sectional view. We can see the hot-pressed carbon element, the lead to element interface, and the thermoset compound encasing the element and the ends of the leads.
Some typical failure modes for composition resistors include resistance increase due to moisture, electrical overstress damage, and mechanical damage. Moisture can lead to an increase in resistance. Moisture will penetrate through the thermoset, much like it does with a plastic encapsulated microcircuit. The moisture penetrates into the carbon element, causing swelling of the binders, leading to a change in the volume percentage of the carbon and a higher resistance. Baking most composition resistors will return the resistance back to normal. One can improve the humidity resistance through the use of coatings on the resistor component, or a conformal coating on the board. Electrical overstress is a common failure mode, and is often accompanied by signs of charring, cracking or burning at the exterior. Finally, mechanical damage can manifest itself as damage to the body of the resistor (a cracked package) or cracking at the interface between the leads and the resistive element.
Please visit http://www.semitracks.com/courses/reliability/semiconductor-reliability.php to learn more about this exciting course!
(Click on each item for details).
Semiconductor Reliability on September 3-5, 2014 (Wed.-Fri.) in San Jose, CA, USA
Failure and Yield Analysis on September 8-11, 2014 (Mon.-Thurs.) in San Jose, CA, USA
If you have a suggestion or a comment regarding our courses, online training, discussion forums, reference materials, or if you wish to suggest a new course or location, please feel free to call us at 1-505-858-0454, or e-mail us at firstname.lastname@example.org.
To submit questions to the Q&A section, inquire about an article, or suggest a topic you would like to see covered in the next newsletter, please contact Jeremy Henderson by e-mail (email@example.com).
We are always looking for ways to enhance our courses and educational materials.