In this two-part article we will discuss leadframes for use in IC packaging. The leadframe creates an electrical connection between the perimeter of the die and the outside of the package. Typically, manufacturers use bondwires to connect the leadframe to the die bond pads. Keep watching to learn more about this technology.
The outline for this section is shown here. First we will discuss stamped leadframes. This is a cost-effective high volume approach but has high non-recurring engineering costs. Next we will discuss etched leadframes. This has a lower non-recurring engineering cost, but typically costs more in high volume production. We’ll then discuss leadframe materials, followed by leadframe plating materials and techniques.
Let’s begin with a brief overview. We use the leadframe to make electrical connections to the printed circuit board. The leadframe is one of two major techniques for making the connection to the circuit board; the other is the use of solder balls, a process known as bumping. The leadframe approach is the oldest and more mature of the processes. We can create leadframes through two processes: stamping or etching to create geometries we need. We can plate leadframes to improve bonding, corrosion resistance and solderability. We create leadframes from various metals, but the primary metal is copper. Manufacturers process most leadframes in long coils, approximately 900 feet or longer.
Engineers prefer stamped leadframes for high volume manufacturing. This is a low cost manufacturing option, but the tooling is more expensive. The tooling can run into the hundreds of thousands of dollars to buy the machinery and create the punch die. There is typically a long lead time as well. In high volume manufacturing though, the advantages of the low unit cost will still outweigh the up-front tooling costs and times. Older leadframe strips are typically around 30 millimeters in width, while newer leadframes are typically 250 by 70 millimeters. This facilitates higher volumes.
In order to create the shape of the leads in the leadframe, we require a set of stamping dice. These die are made from hard materials like silicon carbide, so that they can punch through many copper leadframes without degrading the dice. This image shows a set of stamping dice for a leadframe.
The stamping process occurs in a pipeline fashion. The machine feeds the leadframe in stages and a heavy plate, containing the stamp die set, stamps the portions sequentially. This machine is relatively expensive, so there is a higher non-recurring engineering cost, but once we purchase the machinery and the die stamp set, it produces a low cost leadframe, on the order of one cent per part or even less. The top image shows the machinery, while the bottom image shows the stamp sequence. The stamp sequence proceeds from left to right. In order to reduce stress on the copper and the machinery, one stamps a small section at a time, so the stamp may need to run more than 20 times to stamp the pattern to create the leadframe.
The second major technique for creating a leadframe is the etch technique. Etching is a sort of chemical stamping or milling. The advantages include faster turn-around times, a low initial cost for tooling, more options for form factors, and lower stress leadframes. The non-recurring engineering costs are much lower, on the order of $5000, and the turn-around time is around 6 weeks. The images on the right show the impact of the stress on the copper from the stamping and etching. Notice the deformation in the copper with the stamped process that introduces stress into the copper. The disadvantages include higher costs for volume production on some leadframe formats, and the inability to create some patterns. Many companies might start their new products with an etched leadframe, and then when volumes ramp, go to a stamped leadframe. The Quad Flat No-Lead, or QFN, is typically done as an etched leadframe. One can etch the leadframe in such a way as to achieve a scalloped surface to facilitate mold locking. The scallops prevent the leads from falling out or being pulled out during later assembly steps.
There are several common materials used for leadframes. One material used early on in the semiconductor industry was Invar or Alloy 42. Alloy 42 is a mixture of iron and nickel. Although Alloy 42 is not as conductive as copper, it does have the advantage in that it doesn’t form a troublesome intermetallic with the tin plating. It also has a low coefficient of thermal expansion, which can help prevent stress problems at the die level. The more common leadframe materials today are copper and its alloys. While pure copper can be used, a copper alloy lead frame like copper-iron, copper-chromium, copper-nickel-silicon, or copper-tin, can have better hardness properties, which reduce bending and deformation during the assembly process and in more aggressive thermal cycling situations. The challenge is to increase hardness without increasing the resistance too much, since an element alloyed with copper will increase the resistance.
Next month we will discuss leadframe platings and their effect on the leadframe and packaging process.
This month’s technical tidbit describes the Inter-Integrated Circuit Interface, or I2C interface. It is a two-wire interface that is gaining increased acceptance as an analog design for test technique to test complex analog circuits.
The I2C interface was developed by Philips Electronics in the early 1980s as a method to attach low speed peripherals to a personal computer. Although this interface has long since disappeared for personal computer devices in favor of the Universal Serial Bus, it still is used for testing purposes on integrated circuits. Although the original specification for I2C called for a 100kHz operating frequency, newer versions of the I2C standard run at frequencies as high as 5MHz.
This drawing shows a block diagram of the I2C interface. There are two pins that interface to the outside world: SDA, the data line; and SCL, the clock line. This extremely low pin count interface is popular for circuits with limited pins, as this interface can be implemented with just two pins. Basically, one microcontroller acts as a master device, and the rest of the devices then operate as slaves to the master. The I2C bus uses pull-up resistors to the power supply, so the combination of those resistors and the capacitance of the SDA and SCL lines limit the frequency of operation.
There are four operating modes for the I2C interface: master transmit, master receive, slave transmit, and slave receive. The most common data and address format is 7-bits, but some versions run with 10-bits. Data transfer is initiated with the Start bit when SDA is pulled low while SCL stays high. Then, SDA sets the transferred bit while SCL is low (blue) and the data is sampled (received) when SCL rises (green). When the transfer is complete, a Stop bit is sent by releasing the data line to allow it to be pulled up while SCL is constantly high. In order to avoid false marker detection, the level on SDA is changed on the falling edge and is captured on the rising edge of SCL. The address and data arrive with the most significant bit first.
An example of a chip that uses this interface is Linear Technology’s LTC2309, an 8-channel, 12-bit Successive Approximation Register (SAR) Digital-to-Analog Converter (DAC). The data input to the DAC uses the I2C interface.
Q: Why do some suppliers sell Copper Alloy lead frames rather than just pure copper lead frames?
A: A copper alloy lead frame (like Cu-Fe, Cu-Cr, Cu-Ni-Si, or Cu-Sn) can have better hardness properties which reduce bending and deformation during the assembly process and in more aggressive thermal cycling situations. The challenge is to increase hardness without increasing the resistance too much, since an element alloyed with copper will increase the resistance.
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