Last month, we delved a little deeper into Thermal Processing, covering Oxidation and Kinetics. This month we’ll focus on the equipment and processing used for thermal processes. Basically, thermal processing occurs in furnaces; however, newer thermal annealing techniques use alternate heating techniques like flash lamps and lasers.
The first item to discuss is thermal oxidation hardware. The atmospheric oxidation furnace is the most common hardware used in the industry on legacy wafer sizes of 200mm or less. This technology uses batch processing, where one to two hundred wafers are loaded into the system at once. The hot wall reactor is the most common type, where the reaction chamber is a large silica tube. The entire chamber sits at equilibrium in a hot wall reactor. These systems can be oriented both horizontally and vertically. Vertical orientation tends to be more common today. There is a gas inlet at one end for steam, oxygen, or chlorine-based gases, and an exhaust port at the other end. Engineers design the tube to be surrounded by high-resistance ceramic coils that serve as heating elements. The coils then heat the wafers through conduction and convection processes. The wafers sit in quartz boats that are made of silica similar to the chamber walls. Thermocouples monitor the temperature and proportional–integral–derivative controllers maintain the temperature.
At 300 millimeter wafer sizes, there are some significant issues with thermal processing. One problem is the longer thermal lag time and larger thermal masses of the systems and wafers. The wafers will warm more slowly than the environment, leading to skewed thermal profiles. This can lead to problems with dopant redistribution, cross-wafer and cross-batch variabilities, and longer diffusion and oxidation times at lower temperatures. 300 millimeter wafers contain a lot of product dice, so mis-processing at 300mm batch can lead to significant scrap. Most oxidization and diffusion steps cannot be re-worked like deposition steps, so this is a big concern. These tools can take up a lot of room, so it can drive up the cost of the clean room facility. Finally, the size of the wafers and the systems makes tool clustering impractical.
This picture shows a process technician with a boat of wafers in front of an oxidation furnace. This particular system is a vertical furnace. The furnace tube is indicated by the arrow. The yellowish glow indicates that the system is probably at the oxidation temperature.
This image shows an example of an oxidation furnace. This particular furnace is a vertical furnace. Most furnaces manufactured today are vertical furnaces, since the temperature profiles can be more easily controlled. Vertical furnaces also take up less room inside the clean room. Given the high cost of clean room space, this makes the vertical furnace the preferred tool. The quartzware rack where the wafers sit during the oxidation process is indicated by the arrow shown here. The quartzware is often referred to as a boat, since it is shaped much like a boat hull. The cassette mechanism for loading and unloading wafers is indicated by the arrow shown here. The cassettes are normally made from a material that does not easily generate particles, like Teflon.
This is an example of an atmospheric oxidation furnace. Many manufacturers use mini-batch reactors for 300 millimeter wafers to reduce the negative side effects we mentioned in the previous slide. Mini batch reactors use a smaller batch size of 25 to 50 wafers along with in-situ rotation to accomplish the thermal process with less risk of large-scale damage. The image on the left shows a cutaway drawing of a vertical furnace, the center image shows a schematic of the loading system, and the image on the right shows an image of a vertical furnace tube.
This diagram shows the basic schematic for an oxidation system. Various gases are routed through a gas panel into the oxidation furnace. This allows one to use dry oxygen, hydrochloric acid, and hydrogen in the oxidation environment. One can also use nitrogen to purge the system. The exhaust from the furnace goes through a burn box. The burn box operates at temperatures high enough to oxidize the remaining gases so that they do not present a hazard. The scrubber then removes any toxic chemicals from the environment.
An outlier is a product that meets the manufacturer specifications and user requirements but exhibits anomalous characteristics with respect to a normal population.
The blue region corresponds to the main portion of the population, while the red data corresponds to the outliers. Outliers can be a problem because some is different with respect to these devices, causing them to fall outside the normal distribution. There is significant evidence from failure and yield analysis work that outliers can then degrade and drift outside the limits set by the product engineers in the product specification. Therefore, it makes sense to eliminate these parts before shipping them. One can use different variables to identify outliers: parametric values associated with transistors, bin data associated with failure modes, continuity/shorts data and overall wafer yield values. Outlier programs can be implemented at parametric test, wafer sort, and at final test. JEDEC Standard JESD50B-01 defines how to run an outlier program, but it does not prescribe how to do the statistical analysis. Most companies will use one or a combination of the following algorithms: the Tukey algorithm, the Cpkn algorithm or the 3 Sigma algorithm to set statistical limits to identify outliers (represented by the dashed red lines in the figure). There are other criteria applied to the identification and disposition of these parts. For more details, see the Outlier Section in the Test or Reliability workspaces on the Online Training Website.
Q: I think IDDQ would be a useful test for us to be able to localize defects, but the IDDQ defect distribution lies within the main population and is difficult to separate out. Do you have any ideas?
A: You might try using other parameters like temperature and voltage to try and separate the defects out of the population. For instance, you can plot the distribution of IDDQ at 25C against the distribution at 85C, or plot the distribution of IDDQ at 1.5V against the distribution at 2.0V and look for outliers that way.
Please visit http://www.semitracks.com/courses/processing/wafer-fab-processing.php to learn more about this exciting course!
(Click on each item for details).
Product Qualification on January 26-27, 2015 (Mon.-Tues.) in San Jose, CA, USA
Wafer Fab Processing on January 26-29, 2015 (Mon.-Thurs.) in San Jose, CA, USA
EOS, ESD and How to Differentiate on January 28-29, 2015 (Wed.-Thurs.) in San Jose, CA, USA
If you have a suggestion or a comment regarding our courses, online training, discussion forums, reference materials, or if you wish to suggest a new course or location, please feel free to call us at 1-505-858-0454, or e-mail us at firstname.lastname@example.org.
To submit questions to the Q&A section, inquire about an article, or suggest a topic you would like to see covered in the next newsletter, please contact Jeremy Henderson by e-mail (email@example.com).
We are always looking for ways to enhance our courses and educational materials.
Home > Newsletters > 2014 November Newsletter