Last month we introduced Thermal Processing as a whole, touching briefly on each process. In this newsletter, we will discuss oxidation and kinetics. The fact that silicon readily forms an oxide on its surface has been a key property in the use of silicon in the semiconductor industry. Thermal oxidation is still an important step in many semiconductor and integrated circuit processes. Engineers still use thermal oxidation for most pad oxides and gate oxides, even in a modern integrated circuit process.
Let’s discuss some important physical properties of thermally grown silicon dioxide. Most of these properties make the silicon-silicon dioxide system the best material system for semiconductor devices. First, thermal silicon dioxide is amorphous, that is, non-crystalline. Figure 1 shows the bonding structure:
Silicon dioxide forms a tetrahedral structure with the silicon atom at the center of 4 oxygen atoms. The tetrahedra have no long-range order, whereas in crystalline silicon dioxide, or fused silica, there is long range order. Thermally grown silicon dioxide is dense, and non-porous, making it a good protection layer during subsequent processing. It is a dielectric, which makes it a good isolation layer. Thermal silicon dioxide exhibits a high electric field breakdown strength, making it one of the best choices for the controlling gate layer in a CMOS transistor. It is not water soluble, so it makes an excellent masking layer. It is chemically stable, which minimizes long-term reliability issues. It has a very high melting point, making it useful for high temperature processing steps. It adheres tightly to the silicon surface, which helps to minimize traps and delamination problems. It creates a stable interface with the silicon that also greatly aids in reliability. It passivates the silicon surface, preventing surface current leakage. And finally, silicon dioxide’s properties are radically changed by presence of impurities. For example, if we add boron or phosphorus, we can reduce the reflow temperature of the oxide and modify the etch rate due to different bonding in the tetrahedral structure.
Let’s begin with a qualitative view of the reaction kinetics for thermal oxidation. We know that the reactions occur at the silicon-silicon dioxide interface, so this means that the oxidant must diffuse through existing oxide to the interface. Therefore, the thicker the oxide, the more diffusion plays a role. The oxide grows out from the interface, and the interface moves into the silicon as the silicon is consumed like we show in figure 2.
Based on the atomic structure and density of the two materials, to grow 10 nanometers of oxide, we consume 4.4 nanometers of silicon. The oxidation rate is a strong function of the temperature. At room temperature for example, the oxide growth on bare silicon reaches only about 1 nanometer in thickness. Scientists and engineers refer to this as a native oxide. There are two regimes of thermal oxidation: linear and parabolic. In the linear regime, the rate is constant with time since the oxidation is reaction rate limited. In the parabolic regime, the rate decreases with time, since the oxidation process is diffusion-rate limited.
Process engineers use three types of thermal oxidation steps: dry oxidation, wet oxidation, and chlorine-based oxidation. With dry oxidation, the basic reaction is silicon plus oxygen gas produces silicon dioxide. With wet oxidation, silicon plus water vapor produces silicon dioxide and hydrogen gas. This is also called “steam oxidation” or “pyrogenic oxidation”. The oxidation rate for wet oxidation is much faster than with dry oxidation, since the OH- (pronounced “O-H-minus”) radical from the water molecule diffuses through the silicon dioxide faster than oxygen does. Table 1 shows some of the properties of the oxide given a dry oxidation or a wet oxidation process. In general, oxides grown with a dry oxidation process exhibit better electrical properties, but these oxides take much longer to grow and require higher temperatures.
A chlorine-based oxidation is a variant of a dry oxidation. Process engineers add chlorine in gaseous form through molecules like dichloroethane or oxalyl (pronounced “oxa-lil”) chloride. These types of gas are known as precursors. In this process, the precursor plus oxygen creates free chlorine. This approach can improve the quality of critical oxides like the gate oxide. It can help reduce mobile ion charge, fixed oxide charges, and improve dielectric breakdown strength. Engineers used chlorine-based oxidation extensively before the introduction of nitrided gate dielectrics. This approach also increased the dry oxidation rate, which could lower the thermal budget. Today, engineers mainly use this technique to create a trench liner that can getter, or trap, metals from the chemical mechanical polishing process.
Figure 3 shows the oxidation process more closely. Oxygen from the oxygen or steam in the furnace diffuses through the oxide, reaching the silicon surface. Once at the silicon surface, the oxygen or steam reacts with the silicon, producing silicon dioxide. The reaction consumes the silicon, so the silicon/silicon dioxide interface moves into the silicon. As the oxide grows, the original silicon surface is at a point that is 44% of the thickness of the oxide. The reactions for both an oxygen-generated oxide and a steam-generated oxide are shown at the bottom. The steam reaction creates hydrogen gas. Hydrogen is a fast diffuser in silicon dioxide, so it rapidly diffuses out of the oxide.
Leakage in reverse biased junctions is an important concept to understand. It plays a key role in the types of applications and use conditions for which we can use silicon circuits. Junction leakage is primarily the result of thermally generated carriers in the depletion region. As carriers are generated, they will be subject to the electric fields present in the depletion region. This will cause electrons to travel toward the N-doped material, since it is positively biased, and holes to travel toward the P-doped material, since it is negatively biased. Figure 1 shows the carrier generation process, and Figure 2 shows the carrier movement after generation. Since leakage current is thermally generated it is exponential with temperature. Leakage currents will double about every eight or ten degrees Celsius in silicon. Silicon “goes intrinsic” at temperatures just above 400C, meaning that the thermally generated carriers actually outnumber doping-generated carriers. Germanium exhibits weaker bonding than silicon and therefore leaks significantly more. For most circuit applications silicon IC’s are good to about 150C whereas germanium would only be good to maybe 100C.
Not only can heat be a source of carriers, but other mechanisms can generate these carriers. For example, light can do this. If one places an exposed reverse-biased pn junction under a probe station with the lights on, one can see the increase in leakage in the junction. The energetic photons from the light inject enough energy to create some number of electron-hole pairs. Another mechanism that can produce this effect is ionizing radiation.
The junction leakage is basically independent of the reverse bias. In other words, it does not increase as the electric field increases, but rather remains relatively constant. Temperature is the main effect.
Q: What is the near-threshold voltage computing?
A: Near-threshold voltage computing is a technique for operating transistors at lower voltages to try and minimize the power-switching product. As one operates at lower voltages, the switching speed goes down, but the power goes down even more so. This effect ends as the power supply approaches the sum of the n-channel and p-channel threshold voltages of the transistors though. Researchers are looking into applications for this technique as it may facilitate low levels of processing while saving power. Rob Aitken of ARM discusses this technique in more detail in this presentation.
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