2005 October Newsletter
Volume 1, Issue 7
1. Special Event - Semiconductor Process Integration Course
Instructor: Dr. Badih El-Kareh
This course covers CMOS, Analog, and Mixed Signal Technologies.
The course will be held at the Embassy Suites in Santa Clara, California, from Tuesday, December 6 through Thursday December 8.
Semitracks, along with Semiconductor International, have put together a three-day course on Semiconductor Process Integration for CMOS, Analog, and Mixed Signal Technologies. Dr. Badih El-Kareh of Texas Instruments will give an overview of the process integration challenges associated with today's advanced semiconductor devices. Dr. El-Kareh is an expert in process integration with over thirty years experience at IBM and Texas Instruments. He is also the winner of EDN's 2002 Innovator of the Year Award. Dr. El-Kareh will cover passive and active components, contact and interconnect issues, isolation technologies such as STI and SOI, transistor integration issues, as well as full CMOS, BiCMOS and high speed bipolar process integration techniques. To register for this event click here.
The course will run from 8 AM to 5 PM with an hour lunch break each day.
2. Upcoming Conferences
International Symposium for Testing and Failure Analysis
November 6-10,2005 San Jose McEnery Convention Center in San Jose, CA
We will be located in Booth #315.
At ISTFA, we will be demonstrating a significant upgrade to our online training. New capabilities include tracking progress, better searching, and a more intuitive user interface.
International Reliability Physics Symposium
March 26-30, 2006 San Jose McEnery Convention Center in San Jose, CA
To view the IRPS website, click here.
3. Course Schedule
Invest in yourself and your staff. Time is running short to enroll in our Fall courses on Semiconductor Reliability, Failure and Yield Analysis, and Process Integration. Come and learn from the experts!
This course provides an overview of the packaging design process. The course covers current packaging technologies, including chip scale packaging, Ball Grid Array technology and other current concepts. This class focuses on techniques and the importance of thermal and mechanical simulations. Discussions and examples will concentrate on thermal performance simulations, assembly & packaging stresses, package reliability (including solder joint fatigue simulation), and interactions between chip and package. In addition, a special section will be examples of successful wafer level simulations.
Packaging Design (January 25-27, 2006) - Scottsdale AZ
Packaging Technology (January 23-24, 2006) - Scottsdale AZ
Thermal Management (January 20, 2006) - Scottsdale AZ
Packaging Design and Packaging Technology Bundle (January 23-27, 2006) - Scottsdale AZ
Packaging Design, Technology, and Thermal Management Bundle (January 20-27, 2006 Scottsdale AZ
Failure and Yield Analysis
Are you new to failure analysis? Does your position require you to have an understanding of failure analysis? Learn about the latest techniques for analyzing complex devices. We have the most comprehensive short course in the industry covering failure analysis. We cover all the techniques from the simple ones (such as Liquid Crystal) all the way to complex ones (such as PICA and Laser Voltage Probing). Learn the secrets of analyzing a component right every time.
Failure and Yield Analysis (April 24-27, 2006) – Austin TX
Failure and Yield Analysis (May 15-18,2006) - Munich Germany
Failure and Yield Analysis (September 18-21, 2006) – Boston MA
Reliability is a critical element to the success of any semiconductor product. Reliability margins are increasingly squeezed by today’s deep submicron technologies. Learn about the major reliability failure mechanisms, test structures, and test equipment. Learn how to optimize reliability, performance, and cost.
Semiconductor Reliability (May 10-12, 2006) – Munich, Germany
Semiconductor Reliability (September 25-27) - Boston, MA
We offer other courses as well as in-house courses. For more information, visit our website at http://www.semitracks.com.
4. Semitracks Segment of the Month
Semitracks’ new and improved online training is convenient, up-to-date, and cost effective. Access the same material presented in our courses whenever you need it, right when you need it without having to worry about the high costs and hassle of traveling. The semiconductor field is an ever-changing one. With access to the most current information, you can stay on top of the new technology. Online training is also very cost effective. For only $500 per year, you gain access to thousands of dollars worth of courses and course material.
Give our online training a try – for free. This month’s topic is the Stuck-At-Fault Model.
The Stuck-At-Fault Model is a widely used detection technique in digital integrated circuits. We cover the origin of the SAF Model, it's advantages and disadvantages. To learn more, click here.
Sign up to access all of Semitracks online training here and “Learn from the Experts” when it’s convenient for you.
5. Technical Tidbits
Contacts in Integrated Circuits
Contacts are an important component of the overall semiconductor manufacturing process. What is a contact? A contact is basically a connection between an interconnect level and the silicon substrate. The main issue with contacts is their resistance. There is always a voltage drop across the contact that is due to the materials properties themselves. One goal in contact engineering is to minimize the resistance of the contact. Contacts can exhibit three different current-voltage characteristics: ohmic, rectifying, and non-linear. In an ohmic contact, the conduction mechanism is field emission through a narrow barrier. This occurs when the doping level in the silicon is in excess of 1.0×10^20 atoms per cubic centimeter. A rectifying contact occurs when the silicon is lightly doped, for example, less than 1.0×10^17 atoms per cubic centimeter. When the doping levels are low, the conduction mechanism is thermionic field emission. Electrons and holes move across the interface only if the electric field is high enough in the reverse direction. If the doping levels are in between these values, one would observe a non-linear ohmic contact. In this case the conduction mechanism is a combination of thermionic and field emission. Ideally, an integrated circuit process should produce contacts with low resistance, a low variability in the resistance, and resistance values that do not change over time. This requires the use of barrier metals, liner materials, and tightly controlled processes for etching and opening contact windows.
6. Our Mission
Education and Training for the Electronics Industry
Semitracks provides education, training, and certification services and products for the electronics industry. We specialize in serving Semiconductor, Microsystems and Nanotechnology suppliers and users. Semitracks Inc. helps engineers, technicians, scientists, and management understand these dynamic fields. We offer courses in Semiconductor Reliability, Test, Packaging, Process Integration, Failure and Yield Analysis, and Focused Ion Beam technology. Learn from the Experts.