Transmission Electron Microscopy Figures

TEM cross section image showing a series of loops at the same depth in the silicon produced by ion implantation of source and drain regions of a transistor. (Courtesy Lucent Technologies).




Plan-view image of oxidation-induced stacking faults and dislocations in a silicon substrate. (Courtesy Sandia National Laboratories).




Plan view image showing both a stacking fault and a particle in the silicon substrate. These defects were associated with a light emitting defect in a p/n junction. The sample was prepared by thinning from the back side of the device. (Courtesy Lucent Technologies).




Higher magnification image of the precipitate particle and the dislocations around it. (Courtesy Lucent Technologies).




Cross-section image showing a silicon substrate with no anomalies. (Courtesy Lucent Technologies).




Cross-sectional image of a metal to silicon contact. The metal penetrates deeply into the silicon substrate, indicating that the substrate contacts were overetched. (Courtesy Lucent Technologies).




Plan view image showing dislocations and stackings faults on a silicon substrate. (Courtesy Lucent Technologies).




Cross-sectional image showing two examples of polysilicon grain structure. The lower layer of polysilicon in this device has relatively large grains, while the upper polysilicon layer is fine-grained. The microstructure of the polysilicon depends upon the deposition conditions and subsequent thermal cycles that the material experiences. (Courtesy Lucent Technologies).




Plan view image showing the grain structure in patterned, sputter-deposited aluminum - 1% silicon metallization lines. The grain size is 2 - 4 micrometers. (Courtesy Allied Signal Kansas City Division).




An example of a typical, defect-free gate oxide. The gate oxide is approximately 23 nanometers thick. (Courtesy Lucent Technologies).




An example of a process-induced gate oxide thinning defect. Thin areas of a gate oxide are susceptible to failure by dielectric breakdown. (Courtesy Lucent Technologies).




An example of a tunnel oxide in a non-volatile memory transistor. Tunnel oxides are very thin (approximately 1.5 nanometers), and can be seen only by performing lattice imaging in the TEM. Lattice imaging uses the interference between the primary electron beam and one or more diffracted beams to produce a phase contrast image which shows the periodicity of the lattice. (Courtesy Sandia National Laboratories).




An example of an energy dispersive x-ray signal from a TEM. The EDS signal is produced from by x-ray generation of electron-hole pairs in a silicon detector. EDS data may be presented as an x-ray spectrum or as elemental maps. X-ray microanalysis using EDS detection can detect elements of atomic number 6 (carbon) and greater. (Courtesy Sandia National Laboratories).




Cross-sectional view of salicide formation on polysilicon lines. Arrow indicates sufficient salicide formation.




Cross-sectional view of salicide formation on polysilicon lines. Note insufficient salicide formation on the polysilicon lines.




Cross-sectional view of salicide formation on polysilicon lines. Note complete lack of salicide formation.




Higher magnification view of insufficient salicide formation on polysilicon lines shown in Figure 15.




Plan view of aluminum-copper interconnect. Note that individual grains and their orientation can be seen.




Higher magnification view of Figure 18.




Cross-sectional view of a titanium-nitride interface on silicon used as a diffusion barrier.




Higher magnification view of the titanium-nitride interface shown in Figure 20.




Cross-sectional view of vias between metal-1 and metal-2.




Higher magnification view of the vias shown in Figure 22.