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RF and Mixed-Signal Testing

Semiconductor and electronics developments continue to proceed at an incredible pace. For example, today's microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry's ability to track something known as Moore's Law. Moore's Law states that an integrated circuit's processing power will double every two years. This has been accomplished by making devices smaller and smaller.

The industry is also pushing to use semiconductor devices in an increasing array of applications. Many of these applications involve a combination of analog and digital signals that drive actuators, read sensors, and convert these signals into digital data. These applications may also involve wireless signals that transfer data at RF frequencies. To accomplish this, the industry is using an ever-increasing array of mixed-signal components. This has created a number of challenges related to the testing of these components and systems. RF and Mixed-Signal Testing is an 8-hour webinar that offers detailed instruction on the testing of semiconductor components and electronic circuit boards. We place special emphasis on fault models, test techniques, and signal generation. This course is a must for every manager, engineer, and technician working in mixed-signal semiconductor test, testing circuits in high performance electronic systems, testing printed circuit boards, or supplying test hardware and software tools to the industry.

By focusing on the fundamentals of mixed-signal testing, participants will learn how test programs are designed, written, and implemented. Our instructors work hard to explain semiconductor test without delving heavily into the complex algorithms and computer science that normally accompany this discipline.

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Course Dates | Location

August 28-31, 2023 | Online Webinar

8:00 AM to 10:00 AM PDT



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Additional Information

If you have any questions concerning this course, please contact us at

Refund Policy

If a course is canceled, refunds are limited to course registration fees. Registration within 21 days of the course is subject to $100 surcharge.

What Will I Learn By Taking This Class?

Participants learn basic but powerful aspects about the mixed-signal semiconductor and electronics testing. This skill-building series is divided into four segments:

  1. Test Phases and Economics. Participants learn the fundamentals of characterization and diagnosis. They learn the assumptions behind wafer sort and final production test. They also learn about test hardware development time, and test time and accuracy.
  2. Direct and Indirect Testing. Participants learn the fundamentals of analog and specification measurements. They learn techniques for test time reduction. They also learn the fundamentals of alternate test techniques and test based on current signatures.
  3. Defect-Oriented Test. Participants learn about fault models, inductive fault analysis, fault simulation and generation of tests based on these concepts.
  4. On-Chip/On-Board Signal Generation. Participants learn how sigma-delta modulators, mixers and passive components can be used to create signals and sense signals on-board or on-chip. They also learn how to implement these techniques and perform a cost benefit analysis.

Course Objectives

  1. The seminar will provide participants with an in-depth understanding of mixed-signal semiconductor and electronics testing and its technical issues.
  2. Participants will understand the basic concepts of test economics, yield, test time, and the cost of test.
  3. The seminar will identify the key issues related to developing mixed-signal test programs for a wide variety of components.
  4. The seminar offers the opportunity to discuss specific test problems with our expert instructors.
  5. Participants will be able to identify basic and advanced principles for defect-oriented test.
  6. Participants will understand how on-chip signals can be generated and evaluated for mixed-signal components, printed circuit boards, and electronic systems.
  7. Participants will become familiar with the IEEE 1149.4 standard for mixed-signal boundary scan testing.
  8. The seminar will introduce fundamental and advanced concepts related to radio frequency (rf) testing.

Course Outline

  1. Test phases
    1. Characterization
    2. Diagnosis
    3. Wafer sort
    4. Final production test
  2. Test economics
    1. Test equipment
    2. Test development time, test application time
    3. Test accuracy and failure and yield coverage
    4. Defect level
  3. Direct testing
    1. Analog specification measurements
      1. Traditional specification measurements
      2. New techniques for specification computation
    2. Test time reduction
      1. Ad-hoc techniques
      2. Set-cover based techniques
      3. Learning machines
  4. Indirect test techniques
    1. Alternate test
      1. Designing and evaluating alternate tests
      2. Alternate test under defect scenarios
    2. Testing based on current signatures
      1. Increasing coverage of IDDQ testing
      2. Vdd-ramp based testing
  5. Defect-oriented test
    1. Fault models
    2. Inductive fault analysis
    3. Fault simulation
    4. Test generation
  6. On-chip/on-board signal generation
    1. Using delta-sigma modulators for signal generation
    2. Using up/down conversion mixers and passive components
    3. Parameter de-embedding
      1. Impact of test board quality on test metrics
      2. De-embedding linear and non-linear parameters
  7. IEEE 1149.4 standard
    1. Implementation
    2. Cost/benefit analysis

Instructional Strategy

By using a combination of instruction by lecture, classroom exercises, and question/answer sessions, participants will learn practical information on mixed-signal semiconductor and electronic systems testing. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. Our instructors are internationally recognized experts in their fields and have years of both current and relevant experience.

Instructor Profile

Dr. Sule Ozev

Sule Ozev

Dr. Sule Ozev received her B.S. degree in Electrical Engineering from Bogazici University, Turkey, and her M.S. and Ph.D. degrees in Computer Science and Engineering from University of California, San Diego in 1995, 1998, and 2002 respectively. Dr. Ozev is an assistant professor at the Electrical and Computer Engineering Department at Duke University. She is the Program Chair of IEEE North Atlantic Test Workshop (NATW) for 2005 and 2006 and the General Chair of NATW for 2007. She serves on various program committees, including IEEE International Conference on Computer-Aided Design (2005-2006), IEEE International Conference on Computer Design (2004-2006), IEEE European Test Symposium (2006-2007), and IEEE International Symposium on Defect and Fault Tolerance (2005-2006).