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Process Integration

Fabrication of semiconductors and integrated circuits (ICs) is arguably one of the most advanced manufacturing processes ever developed. A state-of-the-art IC requires a ultra clean environment, ultra pure chemicals and gases, highly sophisticated fabrication tools, and a team with extensive knowledge of chemical engineering, semiconductor physics, modeling, and logistics management. The materials in this section cover the main disciplines or steps used in semiconductor fabrication. They include: Growth and preparation of the starting material (Si, GaAs, or other semiconductor materials), Diffusion, Oxidation, Cleaning, Ion Implantation, Lithography, Chemical Vapor Deposition Physical Vapor Deposition and Chemical Mechanical Planarization.

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Basic CMOS Process Animation

Basic CMOS Manufacturing Process in 3D

Materials for Processing

This course covers the materials that are used in semiconductor processing. The main focus of this material is on low-k materials, but will be expanded to include chemicals and gases.


Alternate Channel Materials

Alternate Gates

Low-K Materials

Low-K Materials Properties - Part 1

Low-K Materials Properties - Part 2

Copper Interconnect

Etch Stop Materials for Low-K Applications

Etch Stop Materials for Low-K Applications (Japanese)


Low-k Materials

Copper Interconnect



Bipolar and BiCMOS

Designers use Bipolar and BiCMOS technologies when they must accurately control and manipulate analog signals. The bipolar transistor has several qualities that allow the engineers to better control the behavior of the circuit, like better matching, lower noise levels, higher current drives, and higher cutoff frequencies. We discuss the physics of bipolar circuit operation, basic bipolar processes, and BiCMOS processes.


Conventional BiCMOS






CMOS (Complementary Metal Oxide Semiconductor) is the most common chip technology in use today. More than 90% of all integrated circuit fabricated today use CMOS technology. CMOS makes excellent digital logic because of its large digital noise immunity and low background current. This course covers the properties of silicon, the behavior of the MOS capacitor, the p-n junction, and the device physics of the MOS transistor.


LOCOS and STI (Process Integration)

Gate First vs. Gate Last

Special Processing Techniques

Mobility Enhancement Techniques

Source Drain Extensions

Salicide and BEOL

3D Structures

CMOS Design Considerations

Quiz: Basic CMOS Process Flow

Quiz: Process Integration


Gate First vs Gate Last


Cross Section