An electrical test is an evaluation of the parametric, functional, or timing performance of a component when electrical power is applied. Parametric tests typically involve dc or analog measurements of current or voltage. Functional tests usually have Boolean test patterns applied to the inputs (the logic stimulus) and the Boolean outputs are evaluated (the logic response). The set of applied stimulus and expected response conditions for all the component's primary input and output pins for each logic state is referred to as a test vector. Timing tests measure the rising and falling edges of signals, usually the primary outputs, to determine the time required for output changes to occur as a result of input stimulus changes. Timing tests are often used to measure the time that the component takes to propagate a change through a critical logic path.
Failure of electrical or electronic components usually involves electrical malfunction or operation outside of the desired electrical limits. Therefore, failure analysis typically requires performing electrical tests to duplicate or reproduce the incorrect operation of the component.
Electrical tests are performed by applying voltage and/or current to the component and observing its voltage and/or current responses. Tests can range from simple, manual measurements of electrical continuity for the component's inputs or outputs to complex functional tests using hundreds of thousands of vectors at test rates greater than 100 MHz. The measurement equipment can range in sophistication from simple, inexpensive hand-held volt-ohm meters to complex, digital test systems costing more than one million dollars.
Electrical tests are performed at the beginning of the analysis to duplicate the customer's observed failure mode. Electrical tests are used during the analysis to operate the component for failure site localization and failure mechanism identification (for example, electrical tests can be used to stimulate the component for SEM voltage contrast analysis). Electrical tests are also used to evaluate the effects of analysis techniques intended to modify or eliminate the failure mechanism or physical defect (for example, electrical tests can be used to determine whether a metal-metal short has been removed by a laser or focused ion beam cut).
MIL-STD-883C
METHOD 3001.1
DRIVE SOURCE, DYNAMIC
3.1 Pulse amplitude. The specified HIGH level of the driving source shall be greater than the VOH of the device. The specified LOW level of the driving source shall be less than VOL of the device.
3.2 Transition times. The transition times of the driving source (tTHL and tTLH) shall be faster than the transition time of the device being tested, unless otherwise stated in the procurement document. The transition times shall normally be measured between the 10 percent and 90 percent levels of the specified pulse.
3.3 Pulse repetition rate (PRR). Unless the pulse repetition rate is the parameter being tested, it shall be chosen so that doubling the rate or reducing by a half will not affect the measurement results.
3.4 Duty factors (duty cycles). The duty cycles of the driving source shall be chosen so that d 10 percent variation in the duty cycle will not affect the measurement results. The duty cycle shall be defined with respect to either a positive or negative pulse. The pulse width (tp) of the input pulses shall be measured between the specified input measurement levels. When more than one pulse input is needed to test a device, the duty cycle of the prime input (i.e., clock, etc.) shall be specified. The phase relationship of all other input pulses shall be referenced to the prime input pulse.
MIL-STD -883C
METHOD 3002.1
LOAD CONDITIONS
2.1 Discrete component load. The load will consist of any combination of capacitive, inductive, resistive, or diode components.
2.1.1 Capacitive load (CL). The total load capacitance of the circuit under test shall include probe and test fixture capacitance and a compensating capacitor as required. The value of the capacitance, measured at 1 MHz +-10 percent, shall be specified in the applicable procurement document.
2.1.2 Inductive load (LL). The total load inductance of the circuit under test shall include probe and test fixture inductance and a compensating inductor as required. The value of the inductance, measured at 1 MHz +-10 percent, shall be specified in the applicable procurement document.
2.1.3 Resistive load (RL). The resistive load shall represent the worst case fan out conditions of the device under test for static tests and a specified fan out condition for dynamic tests. For sink loads, the resistor shall be connected between the power supply (VCC or VDD) and the circuit output for TTL, DTL, RTL, C-MOS, and MOS (N-Channel) and between circuit output and ground for MOS (P-Channel). For source loads, the resistor shall be connected between circuit output and ground for TTL, DTL, RTL, C-MOS, and MOS (N-Channel) and between VDD and the circuit output for MOS (P-Channel). For ECL devices, the load resistors are connected from the output to a specified negative voltage.
2.1.4 Diode load (DL). The diode load shall represent the input diode(s) of the circuit under test. The equivalent diode, as specified in the applicable procurement document, will also represent the base-emitter or base-collector diode of any transistor in the circuit path of the normal load.
2.2 Dynamic load change. The load shall automatically change its electrical parameters as the device under test changes logic state if this is the normal situation for the particular family of circuits being tested. One method of accomplishing this dynamic change is to simulate devices Or use actual devices from the same logic family equal to the specified load.
MIL-STD-883C
METHOD 3003.1
DELAY MEASUREMENTS
1.1 Definitions. The following definitions for the purpose of this test method shall apply.
1.1.1 Propagation delay time (tPHL). The time measured with the specified output changing from the defined HIGH level to the defined LOW level with respect to the corresponding input transition.
1.1.2 Propagation delay time (tPLH). The time measured with the specified output changing from the defined LOW level to the defined HIGH level with respect to the corresponding input transition.
3.1 Measurements at a voltage point. tPLH and tPHL shall be measured from the threshold voltage point on the driving signal to the threshold voltage point on the test circuit output signal for both inverting and non-inverting logic. These delays shall be measured at the input and output terminals of the device under test. The device under test shall be conditioned according to the applicable procurement document with nominal bias voltages applied. Figure 3003-1 and Figure 3003-2 show typical delay measurements.
3.2 Measurements at percentage points. tPLH and tPHL shall be measured from a specified percentage point on the driving signal to a specified percentage point on the test circuit output signal for both inverting and noninverting logic. These delays shall be measured at the input and output terminals of the device under test. The device under test shall be conditioned according to the applicable procurement document with nominal bias voltages applied. Figure 3003-1 and Figure 3003-2 show typical delay measurements.
MIL-STD-883C
METHOD 3004.1
TRANSITION TIME MEASUREMENTS
1.1 Definitions. The following definitions shall apply for the purpose of this method.
1.1.1 Rise time (tTLH). The transition time of the output from 10 percent to 90 percent or voltage levels of output voltage with the specified output changing from the defined LOW level to the defined HIGH level.
1.1.2 Fall time (tTHL). The transition time of the output from 90 percent to 10 percent or voltage levels of output voltage with the specified output changing from the defined HIGH level to the defined LOW level.
3.1 Measurement of tTLH and tTHL. Unless otherwise stated, the rise transition time (tTLH) shall be measured between the 10 percent and 90 percent points on the positive transition of the output pulse and the fall transition time (tTHL) shall be measured between the 90 percent and 10 percent points on the negative transition of the output pulse. The device under test shall be conditioned according to the applicable procurement document with nominal bias voltages applied. Figure 3004-1 shows typical transition time measurement.
MIL-STD-883C
METHOD 3014
FUNCTIONAL TESTING
Typical drive source waveforms.
Typical Delay Measurements.
Typical Delay Measurements.
Typical transition time measurements