Design for Reliability Testing

Semiconductor reliability is at a crossroads. In the past, reliability meant discovering, characterizing and modeling failure mechanisms, and then determining their impact on the reliability of the circuit. Today, reliability can involve tradeoffs between performance and reliability, assessing the impact of new materials, dealing with limited margins, etc. The product lifecycle for many components has become so short that there are limited opportunities to impact the overall reliability of the device, whether that be testing at the package level or even the wafer level. While reliability levels are at an all-time high in the industry, rapid changes may quickly cause reliability to deteriorate. This requires that one put thought and effort into the reliability of a component upfront, during the design phase. The question is how to do this properly. The industry needs competent engineers and scientists to help solve these problems. Design for Reliability Testing is a 1-day course that offers detailed instruction on a variety of subjects pertaining to designing in reliability. This course is designed for every manager, engineer, and technician concerned with reliability in the semiconductor field, designing semiconductor components, or supplying tools to the industry.

Register for an Account

Item

1-Year Online Training Subscription

(Includes this and other materials.)

Cost

$700

Pay Via Credit Card

Add To Shopping Cart

Pay Via Purchase Order/Check

Please email the printable registration form for online training to us at the email address on the form to complete your order.

Additional Information

Refund Policy

What Will I Learn By Taking This Class?

Participants will learn to develop the skills to determine what failure mechanisms might occur, and how to develop models for them, understand their impact at the circuit, block, and IC level, and minimize their impact in the product. This skill-building series is divided into three segments:

Fundamentals of Reliability Physics and Accelerated Testing. Participants will learn the fundamentals of various failure mechanisms and the testing used to accelerate those mechanisms.
Design-In Reliability Issues. Participants will learn how the major failure mechanisms manifest themselves at the circuit and chip level. These include: time-dependent dielectric breakdown, hot carrier degradation, electromigration, stress-induced voiding, moisture, corrosion, contamination, and thermomechanical effects. Participants will learn the process for converting test structure results into circuit level behaviors.
Mission Profiles. Participants will learn the conversion of transient use-conditions into static equivalents for Design Rule generation and verification.

Course Objectives

This course will provide participants with an in-depth understanding of the failure mechanisms, test structures, equipment, and testing methods used to achieve today’s high reliability components.
Participants will be able to identify basic test structures and how they are used to help quantify reliability on semiconductor devices.
Participants will be able to interpret test structure data and make inferences from that data.
This course will identify the major failure mechanisms, explain how they are observed, and how they are modeled at the circuit level.
Participants will learn to convert dynamic condition test data into a static model that can be used in the design environment for design rule checking and layout.
Participants will be able to knowledgeably implement screens that are appropriate to assure the reliability of a component.
Participants will be able to identify appropriate software tools to purchase when starting or expanding their design operations.

Course Contents